TY  - BOOK
AU  - Baker,R.Jacob, 
TI  - CMOS: circuit design, layout and, simulation / 
SN  - 81-203-1682-7
U1  - 621.381 5 
PY  - 2002///
CY  - New Delhi
PB  - Prentice Hall
KW  - CMOS
ER  -